Ij

a
Low Cost, Miniature
Isolation Amplifiers
AD202/AD204
FEATURES
PRODUCT HIGHLIGHTS
Small Size: 4 Channels/lnch
The AD202 and AD204 are full-featured isolators offering
Low Power: 35 mW (AD204)
numerous benefits to the user:
High Accuracy:  0.025% Max Nonlinearity (K Grade)
Small Size: The AD202 and AD204 are available in SIP and
High CMR: 130 dB (Gain = 100 V/V)
DIP form packages. The SIP package is just 0.25" wide, giving
Wide Bandwidth: 5 kHz Full-Power (AD204)
the user a channel density of four channels per inch. The isolation
High CMV Isolation:  2000 V pk Continuous (K Grade)
barrier is positioned to maximize input to output spacing. For
(Signal and Power)
applications requiring a low profile, the DIP package provides a
Isolated Power Outputs
height of just 0.350".
Uncommitted Input Amplifier
High Accuracy: With a maximum nonlinearity of ? 0.025%
APPLICATIONS
for the AD202K/AD204K (? 0.05% for the AD202J/AD204J)
Multichannel Data Acquisition
and low drift over temperature, the AD202 and AD204 provide
Current Shunt Measurements
high isolation without loss of signal integrity.
Motor Controls
Low Power: Power consumption of 35 mW (AD204) and
Process Signal Isolation
75 mW (AD202) over the full signal range makes these isolators
High Voltage Instrumentation Amplifier
ideal for use in applications with large channel counts or tight
power budgets.
GENERAL DESCRIPTION
The AD202 and AD204 are general purpose, two-port, trans-
Wide Bandwidth: The AD204's full-power bandwidth of 5 kHz
former-coupled isolation amplifiers that may be used in a broad
makes it useful for wideband signals. It is also effective in appli-
range of applications where input signals must be measured,
cations like control loops, where limited bandwidth could result
processed, and/or transmitted without a galvanic connection.
in instability.
These industry standard isolation amplifiers offer a complete
Excellent Common-Mode Performance: The AD202K/
isolation function, with both signal and power isolation provided
AD204K provide ? 2000 V pk continuous common-mode isola-
for in a single compact plastic SIP or DIP style package. The
tion, while the AD202J/AD204J provide ? 1000 V pk continuous
primary distinction between the AD202 and the AD204 is that
common-mode isolation. All models have a total common-mode
the AD202 is powered directly from a 15 V dc supply while the
input capacitance of less than 5 pF inclusive of power isolation.
AD204 is powered by an externally supplied clock, such as the
This results in CMR ranging from 130 dB at a gain of 100 dB to
recommended AD246 Clock Driver.
104 dB (minimum at unity gain) and very low leakage current
The AD202 and AD204 provide total galvanic isolation between
(2 mA maximum).
the input and output stages of the isolation amplifier through
Flexible Input: An uncommitted op amp is provided at the
the use of internal transformer-coupling. The functionally com-
input of all models. This provides buffering and gain as required,
plete AD202 and AD204 eliminate the need for an external,
and facilitates many alternative input functions including filtering,
user-supplied dc-to-dc converter. This permits the designer
summing, high voltage ranges, and current (transimpedance) input.
to minimize the necessary circuit overhead and consequently
reduce the overall design and component costs.
Isolated Power: The AD204 can supply isolated power of
? 7.5 V at 2 mA. This is sufficient to operate a low-drift input
The design of the AD202 and AD204 emphasizes maximum
preamp, provide excitation to a semiconductor strain gage, or
flexibility and ease of use, including the availability of an
power any of a wide range of user-supplied ancillary circuits.
uncommitted op amp on the input stage. They feature a bipolar
The AD202 can supply ? 7.5 V at 0.4 mA, which is sufficient to
? 5 V output range, an adjustable gain range of from 1V/V to
100 V/V, ? 0.025% max nonlinearity (K grade), 130 dB of
operate adjustment networks or low power references and op
amps, or to provide an open-input alarm.
CMR, and the AD204 consumes a low 35 mW of power.
The functional block diagrams can be seen in Figures 1a and 1b.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
use, nor for any infringements of patents or other rights of third parties that
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www.analog.com
may result from its use. No license is granted by implication or otherwise
Fax: 781/326-8703
? Analog Devices, Inc., 2002
under any patent or patent rights of Analog Devices.
AD202/AD204?SPECIFICATIONS   (Typical @ 25 C and V = 15 V unless otherwise noted.)
S
Model
AD204J
AD204K
AD202J
AD202K
GAIN
*
*
*
Range
1 V/V?100 V/V
? 0.5% typ (? 4% max)
*
*
*
Error
? 20 ppm/C typ (? 45 ppm/C max)
*
*
*
vs. Temperature
? 50 ppm/1000 Hours
*
*
*
vs. Time
? 0.01%/V
? 0.01%/V
? 0.01%/V
? 0.01%/V
vs. Supply Voltage
? 0.05% max
? 0.025% max
? 0.05% max
? 0.025% max
Nonlinearity (G = 1 V/V)1
? 0.0015%/mA
*
*
*
Nonlinearity vs. Isolated Supply Load
INPUT VOLTAGE RATINGS
?5 V
*
*
*
Input Voltage Range
Max lsolation Voltage (Input to Output)
AC, 60 Hz, Continuous
750 V rms
1500 V rms
750 V rms
1500 V rms
? 1000 V Peak
? 2000 V Peak
? 1000 V Peak
? 2000 V Peak
Continuous (AC and DC)
Isolation-Mode Rejection Ratio (IMRR) @ 60 Hz
RS ? 100 W (HI and LO Inputs) G = 1 V/V
110 dB
110 dB
105 dB
105 dB
*
*
*
G = 100 V/V
130 dB
RS ? l kW (Input HI, LO, or Both) G = 1 V/V
104 dB min
104 dB min
100 dB min
100 dB min
*
*
*
G = 100 V/V
110 dB min
2 mA rms max
*
*
*
Leakage Current Input to Output @ 240 V rms, 60 Hz
INPUT IMPEDANCE
1012 W
*
*
*
Differential (G = 1 V/V)
2 GW 4.5 pF
*
*
*
Common-Mode
INPUT BIAS CURRENT
Initial, @ 25C
? 30 pA
*
*
*
vs. Temperature (0C to 70C)
? 10 nA
*
*
*
INPUT DIFFERENCE CURRENT
Initial, @ 25C
? 5 pA
*
*
*
vs. Temperature (0C to 70C)
? 2 nA
*
*
*
INPUT NOISE
4 mV p-p
*
*
*
Voltage, 0.1 Hz to 100 Hz
50 nV/?ont>Hz
*
*
*
f > 200 Hz
FREQUENCY RESPONSE
Bandwidth (VO ? 10 V p-p, G = 1 V?50 V/V)
5 kHz
5 kHz
2 kHz
2 kHz
Settling Time, to ? 10 mV (10 V Step)
*
*
*
1 ms
OFFSET VOLTAGE (RTI)
Initial, @ 25C Adjustable to Zero
(? 15 ? 15/G)mV max
(? 5 ? 5/G) mV max
(? 15 ? 15/G) mV max (? 5 ? 5/G) mV max
?/font>
10^
??10 ? G ~ mV C
vs. Temperature (0C to 70C)
*
*
*
?/font>
?
RATED OUTPUT
?5 V
*
*
*
Voltage (Out HI to Out LO)
? 6.5 V
*
*
*
Voltage at Out HI or Out LO (Ref. Pin 32)
3 kW
3 kW
7 kW
7 kW
Output Resistance
*
*
*
Output Ripple, 100 kHz Bandwidth
10 mV p-p
*
*
*
5 kHz Bandwidth
0.5 mV rms
ISOLATED POWER OUTPUT2
? 7.5 V
*
*
*
Voltage, No Load
? 10%
*
*
*
Accuracy
400 mA Total
400 mA Total
2 mA (Either Output)3
2 mA (Either Output)3
Current
*
*
*
Regulation, No Load to Full Load
5%
*
*
*
Ripple
100 mV p-p
OSCILLATOR DRIVE INPUT
Input Voltage
15 V p-p Nominal
15 V p-p Nominal
N/A
N/A
Input Frequency
25 kHz Nominal
25 kHz Nominal
N/A
N/A
POWER SUPPLY (AD202 Only)
15 V ? 5%
15 V ? 5%
Voltage, Rated Performance
N/A
N/A
15 V ? 10%
15 V ? 10%
Voltage, Operating
N/A
N/A
Current, No Load (VS = 15 V)
N/A
N/A
5 mA
5 mA
TEMPERATURE RANGE
0C to 70C
*
*
*
Rated Performance
?40C to +85C
*
*
*
Operating
?40C to +85C
*
*
*
Storage
PACKAGE DIMENSIONS4
2.08" ? 0.250" ? 0.625"
*
*
*
SIP Package (Y)
2.10" ? 0.700" ? 0.350"
*
*
*
DlP Package (N)
3
NOTES
3 mA with one supply loaded.
4
*Specifications same as AD204J.
Width is 0.25" typ, 0.26" max.
1
Nonlinearity is specified as a % deviation from a best straight line.
Specifications subject to change without notice.
1.0 mF min decoupling required (see text).
2
?2?
REV. D
AD202/AD204
PIN DESIGNATIONS
AD246?SPECIFICATIONS
(Typical @ 25C and VS = 15 V unless otherwise noted.)
AD202/AD204 SIP Package
Pin
Function
Model
AD246JY
AD246JN
OUTPUTl
1
+INPUT
25 kHz Nominal  *
Frequency
2
INPUT/VISO COMMON
15 V p-p Nominal *
Voltage
3
?INPUT
*
Fan-Out
32 Max
4
INPUT FEEDBACK
POWER SUPPLY
5
?VISO OUTPUT
REQUIREMENTS
6
+VISO OUTPUT
15 V ? 5%
*
Input Voltage
31
15 V POWER IN (AD202 ONLY)
Supply Current
32
CLOCK/POWER COMMON
*
Unloaded
35 mA
*
Each AD204 Adds
2.2 mA
33
CLOCK INPUT (AD204 ONLY)
Each 1 mA Load on AD204
37
OUTPUT LO
*
+VISO or ?VISO Adds
0.7 mA
38
OUTPUT HI
NOTES
*Specifications the same as the AD246JY.
AD202/AD204 DIP Package
1
The high current drive output will not support a short to ground.
Specifications subject to change without notice.
Pin
Function
AD246 Pin Designations
1
+INPUT
2
INPUT/VISO COMMON
Pin (Y)
Pin (N)
Function
3
?INPUT
1
12
15 V POWER IN
18
OUTPUT LO
2
1
CLOCK OUTPUT
19
OUTPUT HI
12
14
COMMON
20
15 V POWER IN (AD202 ONLY)
13
24
COMMON
21
CLOCK INPUT (AD204 ONLY)
22
CLOCK/POWER COMMON
36
+VISO OUTPUT
37
?VISO OUTPUT
38
INPUT FEEDBACK
ORDERING GUIDE
Package
Max Common-Mode
Max
Model
Option
Voltage (Peak)
Linearity
? 0.05%
AD202JY
SIP
1000 V
? 0.025%
AD202KY
SIP
2000 V
? 0.05%
AD202JN
DIP
1000 V
? 0.025%
AD202KN
DIP
2000 V
? 0.05%
AD204JY
SIP
1000 V
? 0.025%
AD204KY
SIP
2000 V
? 0.05%
AD204JN
DIP
1000 V
? 0.025%
AD204KN
DIP
2000 V
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
WARNING!
accumulate on the human body and test equipment and can discharge without detection. Although
the AD202/AD204 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
ESD SENSITIVE DEVICE
recommended to avoid performance degradation or loss of functionality.
REV. D
?3?
AD202/AD204
the output leads to get signal inversion. Additionally, in multi-
DIFFERENCES BETWEEN THE AD202 AND AD204
The primary distinction between the AD202 and AD204 is in
channel applications, the unbuffered outputs can be multiplexed
the method by which they are powered: the AD202 operates
with one buffer following the mux. This technique minimizes
directly from 15 V dc while the AD204 is powered by a non-
offset errors while reducing power consumption and cost. The
output resistance of the isolator is typically 3 kfor the AD204
isolated externally-supplied clock (AD246) that can drive up to
(7 kfor AD202) and varies with signal level and temperature,
32 AD204s. The main advantages of using the externally-
clocked AD204 over the AD202 are reduced cost in multichannel
so it should not be loaded (see Figure 2 for the effects of load
applications, lower power consumption, and higher bandwidth.
upon nonlinearity and gain drift). In many cases, a high imped-
In addition, the AD204 can supply substantially more isolated
ance load will be present or a following circuit such as an output
power than the AD202.
filter can serve as a buffer so that a separate buffer function will
not often be needed.
Of course, in a great many situations, especially where only one
or a few isolators are used, the convenience of standalone opera-
NON-
GAIN
GAIN TC
tion provided by the AD202 will be more significant than any
LINEARITY
CHANGE CHANGE
(ppm/ C)
(%)
(%)
of the AD204's advantages. There may also be cases where it is
.25
?10
?500
desirable to accommodate either device interchangeably, so the
pinouts of the two products have been designed to make that
easy to do.
?8
?400
0.20
FB
AD202
?6
?300
0.15
AD202 GAIN AND GAIN TC
IN?
SIGNAL
AD202 NONLINEARITY
DEMOD
HI
MOD
IN+
?4
?200
5V
0.10
5V
AD204 GAIN AND GAIN TC
VOUT
FS
VSIG
FS
LO
IN COM
?2
?100
0.05
+7.5V
POWER
+VISO OUT
RECT
15V DC
OSCILLATOR
AND
?7.5V
FILTER
?VISO OUT
25kHz
AD204 NONLINEARITY
25kHz
0
0
0
POWER
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
RETURN
0
OUTPUT LOAD ? M
Figure 2. Effects of Output Loading
Figure 1a. AD202 Functional Block Diagram
USING THE AD202 AND AD204
FB
AD204
Powering the AD202. The AD202 requires only a single 15 V
IN?
power supply connected as shown in Figure 3a. A bypass capaci-
SIGNAL
DEMOD
HI
MOD
tor is provided in the module.
IN+
5V
5V
VOUT
VSIG
FS
FS
LO
AD202
IN COM
+7.5V
POWER
CLOCK
+VISO OUT
RECT
5%
POWER
15V
15V p-p
AND
CONV.
?7.5V
25kHz
FILTER
?VISO OUT
25kHz
25kHz
15V RETURN
POWER
RETURN
Figure 1b. AD204 Functional Block Diagram
Figure 3a.
(Pin Designations Apply to the DIP-Style Package)
Powering the AD204. The AD204 gets its power from an
INSIDE THE AD202 AND AD204
externally supplied clock signal (a 15 V p-p square wave with a
The AD202 and AD204 use an amplitude modulation technique
nominal frequency of 25 kHz) as shown in Figure 3b.
to permit transformer coupling of signals down to dc (Figure 1a
and 1b). Both models also contain an uncommitted input op
AD246
amp and a power transformer that provides isolated power to
AD204
AD204
AD204
15V
the op amp, the modulator, and any external load. The power
+
transformer primary is driven by a 25 kHz, 15 V p-p square
wave generated internally in the case of the AD202, or supplied
externally for the AD204.
15V RETURN
Within the signal swing limits of approximately ? 5 V, the out-
put voltage of the isolator is equal to the output voltage of the
Figure 3b.
op amp; that is, the isolation barrier has unity gain. The output
signal is not internally buffered, so the user is free to interchange
(NOTE: Circuit figures shown on this page are for SIP-style packages. Refer to
Page 3 for proper DIP package pinout.)
?4?
REV. D
AD202/AD204
AD246 Clock Driver. The AD246 is a compact, inexpensive
AD202
clock driver that can be used to obtain the required clock from a
OR
RF
AD204
single 15 V supply. Alternatively, the circuit shown in Figure 4
100pF
VO
(essentially an AD246) can be used. In either case, one clock
V
2k
circuit can operate at least 32 AD204s at the rated minimum
(1 + ???)
F
supply voltage of 14.25 V and one additional isolator can be
VO = V SIG
R
RG
G
SIG
operated for each 40 mV increase in supply voltage up to 15 V.
R
RF
20k
A supply bypass capacitor is included in the AD246, but if many
AD204s are operated from a single AD246, an external bypass
capacitor should be used with a value of at least 1 mF for every
Figure 6. Input Connections for Gain > 1
five isolators used. Place the capacitor as close as possible to the
The noninverting circuit of Figures 5 and 6 can also be used to
clock driver.
your advantage when a signal inversion is needed: just interchange
either the input leads or the output leads to get inversion. This
15V
14
6
6
5
approach retains the high input resistance of the noninverting
180pF
1N914
TELEDYNE
circuit, and at unity gain no gain-setting resistors are needed.
1
TSC426
10
2
7
3
CLK
Q
When the isolator is not powered, a negative input voltage of
RC
CD
OUT
2
4047B
more than about 2 V will cause an input current to flow. If the
R
+1 F
5
4
C
49.9k
signal source can supply more than a few mA under such con-
35V
1N914
ditions, the 2 kW resistor shown in series with IN+ should be
12 9
8
7
4
3
CLK AND
used to limit current to a safe value. This is particularly impor-
PWR COM
tant with the AD202, which may not start if a large input current
Figure 4. Clock Driver
is present.
Input Configurations. The AD202 and AD204 have been
Figure 7 shows how to accommodate current inputs or sum
designed to be very easy to use in a wide range of applications.
currents or voltages. This circuit can also be used when the
The basic connection for standard unity gain applications, useful
input signal is larger than the ? 5 V input range of the isolator;
for signals up to ? 5 V, is shown in Figure 5; some of the possible
for example, a ? 50 V input span can be accommodated with
variations are described below. When smaller signals must be
RF = 20 kW and RS = 200 kW. Once again, a capacitor from FB
handled, Figure 6 shows how to achieve gain while preserving a
to IN COM is required for gains above five.
very high input resistance. The value of feedback resistor RF
should be kept above 20 kW for best results. Whenever a gain of
IS
AD202
more than five is taken, a 100 pF capacitor from FB to IN COM
OR
is required. At lower gains this capacitor is unnecessary, but it
RF
AD204
RS2
will not adversely affect performance if used.
V
RS1
VS2
FB
VS1
IN?
OUT
(  2k
HI
SEE TEXT)
IN+
VSIG
VOUT
OUT
( 5V)
5V
LO
IN COM
(
)
RF
F
V = ? VS1 ??? + V S2 ??? + IS RF + ...
RS1
RS2
R RF
20k
15V OR
CLOCK
AD202
Figure 7. Connections for Summing or Current Inputs
OR
AD204
Figure 5. Basic Unity-Gain Application
(NOTE: Circuit figures shown on this page are for SIP-style packages. Refer to
Page 3 for proper DIP package pinout.)
REV. D
?5?
AD202/AD204
G
Adjustments. When gain and zero adjustments are needed, the
5k
AD202
AIN
circuit details will depend on whether adjustments are to be made
OR
V
AD204
at the isolator input or output, and (for input adjustments) on
47.5k
RS
the input circuit used. Adjustments are usually best done on the
input side, because it is better to null the zero ahead of the gain,
S
and because gain adjustment is most easily done as part of the
5
200
gain-setting network. Input adjustments are also to be preferred
+7.5
when the pots will be near the input end of the isolator (to mini-
0k
mize common-mode strays). Adjustments on the output side
1Z 0k
0
?7.5
might be used if pots on the input side would represent a hazard
ERO
due to the presence of large common-mode voltages during
Figure 8b. Adjustments for Summing or Current Input
adjustment.
Figure 9 shows how zero adjustment is done at the output by
Figure 8a shows the input-side adjustment connections for use
taking advantage of the semi-floating output port. The range of
with the noninverting connection of the input amplifier. The
this adjustment will have to be increased at higher gains; if that
zero adjustment circuit injects a small adjustment voltage in series
is done, be sure to use a suitably stable supply voltage for the
with the low side of the signal source. (This will not work if the
pot circuit.
source has another current path to input common or if current
flows in the signal source LO lead). Since the adjustment volt-
There is no easy way to adjust gain at the output side of the
age is injected ahead of the gain, the values shown will work for
isolator itself. If gain adjustment must be done on the output
any gain. Keep the resistance in series with input LO below a
side, it will have to be in a following circuit such as an output
few hundred ohms to avoid CMR degradation.
buffer or filter.
G
5k
AIN
AD202
AD202
OR
OR
V 47.5k
AD204
AD204
5
2k
VO
+15V
RG
100k
0k
Z
S
ERO
05  F
200
.1
+7.5
200
?15V
F
0k
1Z 0k
0
?7.5
ERO
Figure 9. Output-Side Zero Adjustment
igure 8a. Adjustments for Noninverting Connection of
Common-Mode Performance. Figures 10a and 10b show
Op Amp
how the common-mode rejection of the AD202 and AD204
Also shown in Figure 8a is the preferred means of adjusting the
varies with frequency, gain, and source resistance. For these
gain-setting network. The circuit shown gives a nominal RF of
isolators, the significant resistance will normally be that in the
50 kW, and will work properly for gains of ten or greater. The
path from the source of the common-mode signal to IN COM.
adjustment becomes less effective at lower gains (its effect is
The AD202 and AD204 also perform well in applications re-
halved at G = 2) so that the pot will have to be a larger fraction
quiring rejection of fast common-mode steps, as described in
of the total RF at low gain. At G = 1 (follower) the gain cannot
the Applications section.
be adjusted downward without compromising input resistance;
it is better to adjust gain at the signal source or after the output.
180
G = 100
Figure 8b shows adjustments for use with inverting input cir-
G=1
160
cuits. The zero adjustment nulls the voltage at the summing
node. This method is preferable to current injection because it is
LO
=0
R
140
less affected by subsequent gain adjustment. Gain adjustment is
again done in the feedback; but in this case it will work all the
120
LO
=5
R 00
way down to unity gain (and below) without alteration.
LO
=0
R
100
RL
= 10
O
80
R
k
LO
= 10
F
k
60
40
20
50 60 100
200
500
1k
2k
5k
10
FREQUENCY ? Hz
igure 10a. AD204
(NOTE: Circuit figures shown on this page are for SIP-style packages. Refer to
Page 3 for proper DIP package pinout.)
?6?
REV. D
AD202/AD204
Except at the highest useful gains, the noise seen at the output
180
G = 100
of the AD202 and AD204 will be almost entirely comprised of
G=1
160
carrier ripple at multiples of 25 kHz. The ripple is typically
2 mV p-p near zero output and increases to about 7 mV p-p for
LO = 0
R
outputs of ? 5 V (1 MHz measurement bandwidth). Adding a
140
capacitor across the output will reduce ripple at the expense of
120
LO
= 50
bandwidth: for example, 0.05 mF at the output of the AD204
R
0
will result in 1.5 mV ripple at ? 5 V, but signal bandwidth will
LO = 0
R
100
be down to 1 kHz.
RL
= 10
O
R
k
80
When the full isolator bandwidth is needed, the simple two-pole
LO
= 10
F
k
active filter shown in Figure 13 can be used. It will reduce ripple
60
to 0.1 mV p-p with no loss of signal bandwidth, and also serves
as an output buffer.
40
10
20
50 60 100
200
500
1k
2k
5k
An output buffer or filter may sometimes show output spikes
FREQUENCY ? Hz
that do not appear at its input. This is usually due to clock noise
igure 10b. AD202
appearing at the op amp's supply pins (since most op amps have
little or no supply rejection at high frequencies). Another com-
Dynamics and Noise. Frequency response plots for the AD202
mon source of carrier-related noise is the sharing of a ground
and AD204 are given in Figure 11. Since neither isolator is slew-
track by both the output circuit and the power input. Figure 13
rate limited, the plots apply for both large and small signals.
shows how to avoid these problems: the clock/supply port of the
Capacitive loads of up to 470 pF will not materially affect fre-
isolator does not share ground or 15 V tracks with any signal
quency response. When large signals beyond a few hundred Hz
circuits, and the op amp's supply pins are bypassed to signal
will be present, it is advisable to bypass ?VISO and +VISO to IN
COM with 1 mF tantalum capacitors even if the isolated supplies
common (note that the grounded filter capacitor goes here as
well). Ideally, the output signal LO lead and the supply com-
are not loaded.
mon meet where the isolator output is actually measured, e.g.,
At 50 Hz/60 Hz, phase shift through the AD202/AD204 is typically
at an A/D converter input. If that point is more than a few feet
0.8(lagging). Typical unit to unit variation is ? 0.2(lagging).
from the isolator, it may be useful to bypass output LO to sup-
ply common at the isolator with a 0.1 mF capacitor.
60
AD204
In applications where more than a few AD204s are driven by a
AD202
single clock driver, substantial current spikes will flow in the
40
power return line and in whichever signal out lead returns to a
low impedance point (usually output LO). Both of these tracks
AMPLITUDE
should be made large to minimize inductance and resistance;
20
RESPONSE
ideally, output LO should be directly connected to a ground
plane which serves as measurement common.
PHASE
0
0
RESPONSE
Current spikes can be greatly reduced by connecting a small
(G = 1)
inductance (68 mH?100 mH) in series with the clock pin of each
AD204. Molded chokes such as the Dale IM-2 series, with dc
?50
?20
resistance of about 5 W, are suitable.
?100
?40
20
50
100
200
500  1k
2k
5k
10k
20k
10
FREQUENCY ? Hz
Figure 11. Frequency Response at Several Gains
200pF
AD711
1 10k
2
The step response of the AD204 for very fast input signals can
10k
be improved by the use of an input filter, as shown in Figure 12.
POINT OF
+
+
MEASUREMENT
The filter limits the bandwidth of the input (to about 5.3 kHz)
000pF
1.0 F 1.0 F
so that the isolator does not see fast, out-of-band input terms
that can cause small amounts (? 0.3%) of internal ringing. The
AD204 will then settle to ? 0.1% in about 300 ms for a 10 V
AD246
AD202
step.
(IF USED)
OR
AD204
AD204
+15V
C
?15V
POWER
SUPPLY
3.30
k
Figure 13. Output Filter Circuit Showing Proper Grounding
.01 F
VS
Figure 12. Input Filter for Improved Step Response
(NOTE: Circuit figures shown on this page are for SIP-style packages. Refer to
Page 3 for proper DIP package pinout.)
REV. D
?7?
AD202/AD204
Using Isolated Power. Both the AD202 and the AD204 provide
Operation at Reduced Signal Swing. Although the nominal
? 7.5 V power outputs referenced to input common. These may be
output signal swing for the AD202 and AD204 is ? 5 V, there
used to power various accessory circuits that must operate at
may be cases where a smaller signal range is desirable. When
the input common-mode level; the input zero adjustment pots
that is done, the fixed errors (principally offset terms and output
described above are an example, and several other possible uses
noise) become a larger fraction of the signal, but nonlinearity is
are shown in the section titled Application Examples.
reduced. This is shown in Figure 15.
The isolated power output of the AD202 (400 mA total from
0.025
either or both outputs) is much more limited in current capacity
than that of the AD204, but it is sufficient for operating micro-
power op amps, low power references (such as the AD589),
0.020
adjustment circuits, and the like.
The AD204 gets its power from an external clock driver, and
0.015
can handle loads on its isolated supply outputs of 2 mA for each
supply terminal (+7.5 V and ?7.5 V) or 3 mA for a single loaded
output. Whenever the external load on either supply is more
0.010
than about 200 mA, a 1 mF tantalum capacitor should be used to
bypass each loaded supply pin to input common.
0.005
Up to 32 AD204s can be driven from a single AD246 (or equi-
valent) clock driver when the isolated power outputs of the
AD204s are loaded with less than 200 mA each, at a worst-case
0
3
1
2
4
5
0
supply voltage of 14.25 V at the clock driver. The number of
V
OUTPUT SIGNAL SWING ?
AD204s that can be driven by one clock driver is reduced by
Figure 15. Nonlinearity vs. Signal Swing
one AD204 per 3.5 mA of isolated power load current at 7.5 V,
PCB Layout for Multichannel Applications. The pinout of
distributed in any way over the AD204s being supplied by that
the AD204Y has been designed to make very dense packing
clock driver. Thus a load of 1.75 mA from +VISO to ?VISO would
possible in multichannel applications. Figure 16a shows the
also count as one isolator because it spans 15 V.
recommended printed circuit board (PCB) layout for the simple
It is possible to increase clock fanout by increasing supply volt-
voltage-follower connection. When gain-setting resistors are
age above the 14.25 V minimum required for 32 loads. One
present, 0.25" channel centers can still be achieved, as shown in
additional isolator (or 3.5 mA unit load) can be driven for each
Figure 16b.
40 mV of increase in supply voltage up to 15 V. Therefore if the
minimum supply voltage can be held to 15 V ? 1%, it is possible
CHANNEL INPUTS
to operate 32 AD204s and 52 mA of 7.5 V loads. Figure 14
0
1
2
shows the allowable combinations of load current and channel
count for various supply voltages.
50
TAL
A TO
= 0m
IISO
40
0.1"
AL
TOT
GRID
5mA
3
=
IISO
30
mA
= 80
AL
TOT
IISO TOTAL
0mA
7
=
IISO
20
CLK COM
CLK
10
OPERATION IN THIS REGION EXCEEDS
4mA LOAD LIMIT PER AD204
OUT COM
0
14.25
14.50
14.75
15.0
MINIMUM SUPPLY VOLTAGE
Figure 14. AD246 Fanout Rules
CHANNEL OUTPUTS
TO MUX
Figure 16a.
(NOTE: Circuit figures shown on this page are for SIP-style packages. Refer to
Page 3 for proper DIP package pinout.)
?8?
REV. D
AD202/AD204
CHANNEL 0
CHANNEL 1
Figure 17. A three-pole active filter is included in the design to
get normal-mode rejection of frequencies above a few Hz and to
HI
HI
LO
LO
provide enhanced common-mode rejection at 60 Hz. If offset
adjustment is needed, it is best done at the trim pins of the OP07
itself; gain adjustment can be done at the feedback resistor.
Note that the isolated supply current is large enough to mandate
the use of 1 mF supply bypass capacitors. This circuit can be
RG RF
RG
RF
used with an AD202 if a low power op amp is used instead of
the OP07.
0.1"
GRID
Process Current Input with Offset. Figure 18 shows an
isolator receiver that translates a 4-20 mA process current
100pF
100pF
signal into a 0 V to 10 V output. A 1 V to 5 V signal appears at
the isolator's output, and a ?1 V reference applied to output LO
provides the necessary level shift (in multichannel applications,
1
1
the reference can be shared by all channels). This technique is
2
2
often useful for getting offset with a follower-type output buffer.
3
3
4
4
5
5
AD202
6
6
OR
+15V
AD204
+
1V
TO
4?20mA
250
5V
+
?
15k
0V
TO
?15V
10V
Figure 16b.
Ak
?
10k
?1V TO
ADDITIONAL
Synchronization. Since AD204s operate from a common
CHANNELS
1
237
D589
clock, synchronization is inherent. AD202s will normally not
interact to produce beat frequencies even when mounted on
?
6.8k
0.25-inch centers. Interaction may occur in rare situations where
a large number of long, unshielded input cables are bundled
15V
together and channel gains are high. In such cases, shielded
Figure 18. Process Current Input Isolator with Offset
cable may be required or AD204s can be used.
The circuit as shown requires a source compliance of at least
5 V, but if necessary that can be reduced by using a lower value
APPLICATIONS EXAMPLES
Low Level Sensor Inputs. In applications where the output of
of current-sampling resistor and configuring the input amplifier
low level sensors such as thermocouples must be isolated, a low
for a small gain.
drift input amplifier can be used with an AD204, as shown in
0.15 F
AD204
2
39k
I
+
470k 0 470k
AD OP-07
+
(1 + 50k )
R
1 F
VO = VI
.038 F
G
R
49.9k
?
G
LO
+
1 F
1 F
CLK
H
+
20M
+7.5V
OPTIONAL
OPEN INPUT
?7.5V
CLK RET
DETECTION
Figure 17. Input Amplifier and Filter for Sensor Signals
(NOTE: Circuit figures shown on this page are for SIP-style packages. Refer to
Page 3 for proper DIP package pinout.)
REV. D
?9?
AD202/AD204
High Compliance Current Source. In Figure 19, an isolator
Floating Current Source/Ohmmeter. When a small floating
current is needed with a compliance range of up to ? 1000 V dc,
is used to sense the voltage across current-sensing resistor RS to
the AD204 can be used to both create and regulate the current.
allow direct feedback control of a high voltage transistor or FET
This can save considerable power, since the controlled current
used as a high compliance current source. Since the isolator has
does not have to return to ground. In Figure 21, an AD589
virtually no response to dc common-mode voltage, the closed-
reference is used to force a small fixed voltage across R. That
loop current source has a static output resistance greater than
1014 W even for output currents of several mA. The output
sets the current that the input op amp will have to return
current capability of the circuit is limited only by power dissipa-
through the load to zero its input. Note that the isolator's out-
tion in the source transistor.
put isn't needed at all in this application; the whole job is done
by the input section. However, the signal at the output could be
?10V TO +250V
useful as it's the voltage across the load, referenced to ground.
AD202
Since the load current is known, the output voltage is propor-
OR
VC
IL =
AD204
tional to load resistance.
OAD
RS
AD204
7.5V
RS
M
1k
A 30k
LOAD
+
1 F
470pF +
100k
+
15V
VR
5V REF
VO =
RL
R
R
+
10k
D589
PS
U10
L
?
20k
F
+
1k
VC
?
ILOAD = 1.23V (2mA MAX)
R
?15V
VLOAD
4V
igure 19. High Compliance Current Source
Motor Control Isolator. The AD202 and AD204 perform
Figure 21. Floating Current Source
very well in applications where rejection of fast common-mode
Photodiode Amplifier. Figure 22 shows a transresistance
steps is important but bandwidth must not be compromised.
connection used to isolate and amplify the output of a photo-
Current sensing in a fill-wave bridge motor driver (Figure 20) is
diode. The photodiode operates at zero bias, and its output
one example of this class of application. For 200 V common-mode
current is scaled by RF to give a 5 V full-scale output.
steps (1 ms rise