Ij

High Precision
5 V Reference
AD586
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Laser Trimmed to High Accuracy
5.000 V  2.0 mV (M Grade)
VIN
NOISE REDUCTION
Trimmed Temperature Coefficient
2 ppm/ C Max, 0 C to 70 C (M Grade)
5 ppm/ C Max, ?40 C to +85 C (B and L Grades)
AD586
10 ppm/ C Max, ?55 C to +125 C (T Grade)
RZ1
RS
Low Noise, 100 nV/Hz
A1
VOUT
Noise Reduction Capability
RZ2
RF
Output Trim Capability
RT
TRIM
MIL-STD-883 Compliant Versions Available
RI
Industrial Temperature Range SOICs Available
Output Capable of Sourcing or Sinking 10 mA
GND
NOTE: PINS 1, 3, AND 7 ARE INTERNAL TEST POINTS.
MAKE NO CONNECTIONS TO THESE POINTS.
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD586 represents a major advance in the state-of-the-art in
1. Laser trimming of both initial accuracy and temperature
monolithic voltage references. Using a proprietary ion-implanted
coefficients results in very low errors over temperature with-
buried Zener diode and laser wafer trimming of high stability
out the use of external components. The AD586M has a
maximum deviation from 5.000 V of ? 2.45 mV between 0?C
thin-film resistors, the AD586 provides outstanding performance
and 70?C, and the AD586T guarantees ? 7.5 mV maximum
at low cost.
total error between ?55?C and +125?C.
The AD586 offers much higher performance than most other 5 V
references. Because the AD586 uses an industry-standard pinout,
2. For applications requiring higher precision, an optional fine-trim
many systems can be upgraded instantly with the AD586.
connection is provided.
The buried Zener approach to reference design provides lower
3. Any system using an industry standard pinout reference can
noise and drift than band gap voltage references. The AD586
be upgraded instantly with the AD586.
offers a noise reduction pin that can be used to further reduce
4. Output noise of the AD586 is very low, typically 4 ?V p-p. A
the noise level generated by the buried Zener.
noise reduction pin is provided for additional noise filtering
The AD586 is recommended for use as a reference for 8-, 10-,
using an external capacitor.
12-, 14-, or 16-bit DACs that require an external precision
5. The AD586 is available in versions compliant with MIL-
reference. The device is also ideal for successive approximation
STD- 883. Refer to the Analog Devices Military Products
or integrating ADCs with up to 14 bits of accuracy and, in
Databook or the current AD586/883B data sheet for detailed
general, can offer better performance than the standard on-chip
specifications.
references.
The AD586J, AD586K, AD586L, and AD586M are specified for
operation from 0?C to 70?C; the AD586A and AD586B are
specified for ?40?C to +85?C operation; and the AD586S and
AD586T are specified for ?55?C to +125?C operation. The
AD586J, AD586K, AD586L, and AD586M are available in an
8-lead PDIP. The AD586J, AD586K, AD586L, AD586A, and
AD586B are available in an 8-lead SOIC package. The AD586J,
AD586K, AD586L, AD586S, and AD586T are available in an
8-lead CERDIP package.
REV. F
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
may result from its use. No license is granted by implication or otherwise
Tel: 781/329-4700
www.analog.com
under any patent or patent rights of Analog Devices. Trademarks and
Fax: 781/326-8703
? 2004 Analog Devices, Inc. All rights reserved.
registered trademarks are the property of their respective owners.
AD586?SPECIFICATIONS  (@ T = 25 C, V
= 15 V, unless otherwise noted.)
A
IN
AD586K/
AD586J
AD586A
AD586L/AD586B
AD586M
AD586S
AD586T
Parameter
Min Typ Max
Min Typ Max
Min  Typ Max
Min
Typ Max
Min
Typ Max
Min
Typ Max
Unit
OUTPUT VOLTAGE
4.980
5.020 4.995
5.005 4.9975
5.0025 4.998
5.002
4.990
5.010 4.9975
5.0025 V
OUTPUT VOLTAGE DRIFT1
0?C to 70?C
ppm/?C
25
15
5
2
?55?C to +125?C
ppm/?C
20
10
GAIN ADJUSTMENT
+6
+6
+6
+6
+6
+6
%
?2
?2
?2
?2
?2
?2
%
LINE REGULATION1
10.8 V < +VIN < 36 V
? 100
? 100
? 100
? 100
?V/V
TMIN to TMAX
11.4 V < +VIN < 36 V
? 150
? 150
?V/V
TMIN to TMAX
LOAD REGULATION1
Sourcing 0 mA < IOUT < 10 mA
25?C
?V/mA
100
100
100
100
150
150
?V/mA
TMIN to TMAX
100
100
100
100
150
150
Sinking ?10 mA < IOUT < 0 mA
25?C
?V/mA
400
400
400
400
400
400
QUIESCENT CURRENT
2
3
2
3
2
3
2
3
2
3
2
3
mA
POWER CONSUMPTION
30
30
30
30
30
30
mW
OUTPUT NOISE
?V p-p
0.1 Hz to 10 Hz
4
4
4
4
4
4
nV/Hz
Spectral Density, 100 Hz
100
100
100
100
100
100
LONG-TERM STABILITY
15
15
15
15
15
15
ppm/1000 Hr
SHORT-CIRCUIT
CURRENT-TO-GROUND
45
60
45
60
45
60
45
60
45
60
45
60
mA
TEMPERATURE RANGE
?C
Specified Performance2
0
70
0
70
0
70
0
70
?55
+125 ?55
+125
?C
?40
+85
?40
+85
?C
Operating Performance3
?40
+85
?40
+85
?40
+85
?40
+85
?55
+125 ?55
+125
NOTES
Maximum output voltage drift is guaranteed for all packages and grades. CERDIP packaged parts are also 100?C production tested.
1
2
Lower row shows specified performance for A and B grades.
3
The operating temperature range is defined as the temperatures extremes at which the device will still function. Parts may deviate from their specified performance
outside their specified temperature range.
Specifications in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All minimum
and maximum specifications are guaranteed, although only those shown in boldface are tested on all production units, unless otherwise specified.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
CONNECTION DIAGRAM
VIN to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V
Power Dissipation (25?C) . . . . . . . . . . . . . . . . . . . . . 500 mW
8 NOISE
Storage Temperature . . . . . . . . . . . . . . . . . . ?65?C to +150?C
TP* 1
REDUCTION
AD586
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300?C
VIN  2
7 TP*
TOP VIEW
Package Thermal Resistance
TP* 3 (Not to Scale) 6 VOUT
JC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22?C/W
GND 4
5 TRIM
JA   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110?C/W
*TP DENOTES FACTORY TEST POINT.
Output Protection: Output safe for indefinite short to ground
NO CONNECTIONS, EXCEPT DUMMY PCB PAD,
SHOULD BE MADE TOTHESE POINTS.
or VIN.
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
?2?
REV. F
AD586
ORDERING GUIDE
Initial
Temperature Temperature
Package
Package
Quantity
Model
Error
Coefficient
Range
Description Option
Per Reel
25 ppm/?C
0?C to 70?C
AD586JN
20 mV
PDIP
N-8
25 ppm/?C
0?C to 70?C
AD586JQ
20 mV
CERDIP
Q-8
25 ppm/?C
0?C to 70?C
AD586JR
20 mV
SOIC
R-8
25 ppm/?C
0?C to 70?C
AD586JR-REEL7
20 mV
SOIC
R-8
750
25 ppm/?C
0?C to 70?C
AD586JRZ1
20 mV
SOIC
R-8
25 ppm/?C
0?C to 70?C
AD586JRZ-REEL71
20 mV
SOIC
R-8
750
15 ppm/?C
0?C to 70?C
AD586KN
5 mV
PDIP
N-8
15 ppm/?C
0?C to 70?C
AD586KQ
5 mV
CERDIP
Q-8
15 ppm/?C
0?C to 70?C
AD586KR
5 mV
SOIC
R-8
15 ppm/?C
0?C to 70?C
AD586KR-REEL
5 mV
SOIC
R-8
2500
15 ppm/?C
0?C to 70?C
AD586KR-REEL7
5 mV
SOIC
R-8
750
15 ppm/?C
0?C to 70?C
AD586KRZ1
5 mV
SOIC
R-8
15 ppm/?C
0?C to 70?C
AD586KRZ-REEL1
5 mV
SOIC
R-8
2,500
15 ppm/?C
0?C to 70?C
AD586KRZ-REEL71
5 mV
SOIC
R-8
750
5 ppm/?C
0?C to 70?C
AD586LN
2.5 mV
PDIP
N-8
5 ppm/?C
0?C to 70?C
AD586LR
2.5 mV
SOIC
R-8
5 ppm/?C
0?C to 70?C
AD586LR-REEL
2.5 mV
SOIC
R-8
2500
5 ppm/?C
0?C to 70?C
AD586LR-REEL7
2.5 mV
SOIC
R-8
750
5 ppm/?C
0?C to 70?C
AD586LRZ1
2.5 mV
SOIC
R-8
5 ppm/?C
0?C to 70?C
AD586LRZ-REEL1
2.5 mV
SOIC
R-8
2,500
5 ppm/?C
0?C to 70?C
AD586LRZ-REEL71
2.5 mV
SOIC
R-8
750
2 ppm/?C
0?C to 70?C
AD586MN
2 mV
PDIP
N-8
15 ppm/?C
?40?C to +85?C
AD586AR
5 mV
SOIC
R-8
15 ppm/?C
?40?C to +85?C
AD586AR-REEL
5 mV
SOIC
R-8
2500
5 ppm/?C
?40?C to +85?C
AD586BR
2.5 mV
SOIC
R-8
5 ppm/?C
?40?C to +85?C
AD586BR-REEL7
2.5 mV
SOIC
R-8
750
5 ppm/?C
0?C to 70?C
AD586LQ
2.5 mV
CERDIP
Q-8
20 ppm/?C
?55?C to +125?C
AD586SQ
10 mV
CERDIP
Q-8
10 ppm/?C
?55?C to +125?C
AD586TQ
2.5 mV
CERDIP
Q-8
10 ppm/?C
?55?C to +125?C
AD586TQ/883B2
2.5 mV
CERDIP
Q-8
NOTES
1
Z = Pb-free part.
2
For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military
Products Databook or the current AD586/883B data sheet.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD586 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. F
?3?
AD586
THEORY OF OPERATION
NOISE PERFORMANCE AND REDUCTION
The noise generated by the AD586 is typically less than 4 ?V p-p
The AD586 consists of a proprietary buried Zener diode refer-
ence, an amplifier to buffer the output, and several high stability
over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz bandwidth is
approximately 200 ?V p-p. The dominant source of this noise is
thin-film resistors as shown in the block diagram in Figure 1.
the buried Zener, which contributes approximately 100 nV/Hz.
This design results in a high precision monolithic 5 V output
reference with initial offset of 2.0 mV or less. The temperature
By comparison, the op amp's contribution is negligible. Figure 3
compensation circuitry provides the device with a temperature
shows the 0.1 Hz to 10 Hz noise of a typical AD586. The noise
coefficient of under 2 ppm/?C.
measurement is made with a band-pass filter made of a 1-pole
high-pass filter with a corner frequency at 0.1 Hz and a 2-pole
Using the bias compensation resistor between the Zener output
low-pass filter with a corner frequency at 12.6 Hz, to create a
and the noninverting input to the amplifier, a capacitor can be
filter with a 9.922 Hz bandwidth.
added at the NOISE REDUCTION pin (Pin 8) to form a low-
pass filter and reduce the noise contribution of the Zener to
If further noise reduction is desired, an external capacitor can
the circuit.
be added between the NOISE REDUCTION pin and ground
as shown in Figure 2. This capacitor, combined with the 4 k
RS and the Zener resistances, forms a low-pass filter on the output
VIN
NOISE REDUCTION
of the Zener cell. A 1 ?F capacitor will have a 3 dB point at 12 Hz,
and it will reduce the high frequency (to 1 MHz) noise to about
160 ?V p-p. Figure 4 shows the 1 MHz noise of a typical AD586
AD586
both with and without a 1 ?F capacitor.
RZ1
RS
A1
VOUT
RZ2
RF
RT
TRIM
RI
GND
NOTE: PINS 1, 3, AND 7 ARE INTERNAL TEST POINTS.
MAKE NO CONNECTIONS TO THESE POINTS.
Figure 1. Functional Block Diagram
APPLYING THE AD586
Figure 3. 0.1 Hz to 10 Hz Noise
The AD586 is simple to use in virtually all precision reference
applications. When power is applied to Pin 2, and Pin 4 is
grounded, Pin 6 provides a 5 V output. No external components
are required; the degree of desired absolute accuracy is achieved
simply by selecting the required device grade. The AD586 requires
less than 3 mA quiescent current from an operating supply of
12 V or 15 V.
An external fine trim may be desired to set the output level to
exactly 5.000 V (calibrated to a main system reference). System
calibration may also require a reference voltage that is slightly
different from 5.000 V, for example, 5.12 V for binary applica-
tions. In either case, the optional trim circuit shown in Figure 2
can offset the output by as much as 300 mV with minimal effect
on other device characteristics.
Figure 4. Effect of 1 ?F Noise Reduction Capacitor
on Broadband Noise
VIN
VIN
VO
OUTPUT
AD586
NOISE
F
REDUCTION
10k
OPTIONAL
TRIM
NOISE
CN
REDUCTION
GND
1 F
CAPACITOR
igure 2. Optional Fine Trim Configuration
?4?
REV. F
AD586
TURN-ON TIME
DYNAMIC PERFORMANCE
Upon application of power (cold start), the time required for the
The output buffer amplifier is designed to provide the AD586
output voltage to reach its final value within a specified error
with static and dynamic load regulation superior to less complete
band is defined as the turn-on settling time. Two components
references.
normally associated with this are: the time for the active circuits
Many ADCs and DACs present transient current loads to the
to settle and the time for the thermal gradients on the chip to
reference, and poor reference response can degrade the converter's
stabilize. Figure 5 shows the turn-on characteristics of the AD586.
performance.
It shows the settling to be about 60 ?s to 0.01%. Note the absence
Figures 6a to 6c display the characteristics of the AD586 output
of any thermal tails when the horizontal scale is expanded to
amplifier driving a 0 mA to 10 mA load.
l ms/cm in Figure 5b.
Output turn-on time is modified when an external noise reduc-
tion capacitor is used. When present, this capacitor acts as an
additional load to the internal Zener diode's current source,
VOUT
3.5V
resulting in a somewhat longer turn-on time. In the case of a
500
1 ?F capacitor, the initial turn-on time is approximately 400 ms
5V
to 0.01% (see Figure 5c).
VL
AD586
0V
Figure 6a. Transient Load Test Circuit
a. Electrical Turn-On
Figure 6b. Large-Scale Transient Response
b. Extended Time Scale
Figure 6c. Fine-Scale Setting for Transient Load
c. Turn-On with 1 ?F CN
Figure 5. Turn-On Characteristics
REV. F
?5?
AD586
references (such as "S" type characteristics), most manufactur-
In some applications, a varying load may be both resistive and
ers have begun to use a maximum limit error band approach to
capacitive in nature, or the load may be connected to the AD586
specify devices. This technique involves measuring the output
by a long capacitive cable.
at three or more different temperatures to specify an output
Figures 7a to 7b display the output amplifier characteristics
voltage error band.
driving a 1000 pF, 0 mA to 10 mA load.
Figure 9 shows the typical output voltage drift for the AD586L
and illustrates the test methodology. The box in Figure 9 is
bounded on the sides by the operating temperature extremes
VOUT
and on the top and the bottom by the maximum and minimum
CL
3.5V
500
output voltages measured over the operating temperature range.
1000pF
The slope of the diagonal drawn from the lower left to the
5V
VL
AD586
upper right corner of the box determines the performance
0V
grade of the device.
Figure 7a. Capacitive Load Transient Response
VMAX ? V MIN
SLOPE = T.C. =
Test Circuit
(TMAX ? T MIN)  5  10?6
5.0027 ? 5.0012
=
(70 C ? 0)  5  10?6
= 4.3ppm/ C
TMIN
TMAX
SLOPE
5.003
VMAX
VMIN
5.000
?20
0
20
40
60
80
Figure 7b. Output Response with Capacitive Load
TEMPERATURE ? C
Figure 9. Typical AD586L Temperature Drift
LOAD REGULATION
The AD586 has excellent load regulation characteristics. Figure 8
Each AD586J, AD586K, and AD586L grade unit is tested at
shows that varying the load several mA changes the output by a
0?C, 25?C, and 70?C. Each AD586SQ and AD586TQ grade
few ?V. The AD586 has somewhat better load regulation per-
unit is tested at ?55?C, +25?C, and +125?C. This approach
formance sourcing current than sinking current.
ensures that the variations of output voltage that occur as the
temperature changes within the specified range will be con-
VOUT ( V)
tained within a box whose diagonal has a slope equal to the
maximum specified drift. The position of the box on the vertical
scale will change from device to device as initial error and the
1000
shape of the curve vary. The maximum height of the box for the
500
appropriate temperature range and device grade is shown in
2
4
6
8
10
LOAD (mA)
Table I. Duplication of these results requires a combination of
0
?6
?4
?2
high accuracy and stable temperature control in a test system.
?500
Evaluation of the AD586 will produce a curve similar to that in
?1000
Figure 9, but output readings could vary depending on the test
methods and equipment used.
Table I. Maximum Output Change in mV
Figure 8. Typical Load Regulation Characteristics
Device
Maximum Output Change (mV)
0?C to 70?C  ?40?C to +85?C  ?55?C to +125?C
Grade
TEMPERATURE PERFORMANCE
The AD586 is designed for precision reference applications where
AD586J
8.75
temperature performance is critical. Extensive temperature testing
AD586K
5.25
ensures that the device's high level of performance is maintained
AD586L
1.75
over the operating temperature range.
AD586M
0.70
AD586A
9.37
Some confusion exists in the area of defining and specifying
AD586B
3.12
reference voltage error over temperature. Historically, references
AD586S
18.00
have been characterized using a maximum deviation per degree
Celsius, i.e., ppm/?C. However, because of nonlinearities in
AD586T
9.00
temperature characteristics that originated in standard Zener
?6?
REV. F
AD586
The AD586 can also be used as a precision reference for mul-
NEGATIVE REFERENCE VOLTAGE FROM AN AD586
tiple DACs. Figure 12 shows the AD586, the AD7628 dual
The AD586 can be used to provide a precision ?5.000 V output
DAC, and the AD712 dual op amp hooked up for single-supply
as shown in Figure 10. The VIN pin is tied to at least a 6 V sup-
operation to produce 0 V to ?5 V outputs. Because both DACs
ply, the output pin is grounded, and the AD586 ground pin is
are on the same die and share a common reference and output
connected through a resistor, RS, to a ?15 V supply. The ?5 V
output is now taken from the ground pin (Pin 4) instead of
op amps, the DAC outputs will exhibit similar gain TCs.
VOUT. It is essential to arrange the output load and the supply
+15V
resistor RS so that the net current through the AD586 is between
+15V
2.5 mA and 10.0 mA. The temperature characteristics and long-
term stability of the device will be essentially the same as that of
VIN
RFB A
VREFA
a unit used in the standard +5 V output configuration.
OUT A
VOUT
DAC A
VOUT A =
AD586
>
AGND
+6V ?? +30V
0 TO ?5V
DB0
10V
DATA
2.5mA <
?I < 10mA
GND
AD7628
AD712
RS   L
RFB B
INPUTS
DB7
OUT B
VIN
VREFB
DAC B
AD586
VOUT
VOUT B =
0 TO ?5V
DGND
GND
IL
?5V
Figure 12. AD586 as a 5 V Reference for a CMOS
RS
Dual DAC
?15V
Figure 10. AD586 as a Negative 5 V Reference
STACKED PRECISION REFERENCES FOR MULTIPLE
VOLTAGES
Often, a design requires several reference voltages. Three AD586s
USING THE AD586 WITH CONVERTERS
can be stacked, as shown in Figure 13, to produce 5.000 V,
The AD586 is an ideal reference for a wide variety of 8-, 12-,
10.000 V, and 15.000 V outputs. This scheme can be extended
14-, and 16-bit ADCs and DACs. Several representative
to any number of AD586s as long as the maximum load current
examples follow.
is not exceeded. This design provides the additional advantage
of improved line regulation on the 5.0 V output. Changes in VIN
5 V REFERENCE WITH MULTIPLYING CMOS
of 18 V to 50 V produce output changes that are below the noise
DACs OR ADCs
level of the references.
The AD586 is ideal for applications with 10- and 12-bit multi-
plying CMOS DACs. In the standard hookup, as shown in
22V TO 46V
Figure 11, the AD586 is paired with the AD7545 12-bit multi-
plying DAC and the AD711 high speed BiFET op amp. The
amplifier DAC configuration produces a unipolar 0 V to ?5 V
VIN
output range. Bipolar output applications and other operating
5V
VOUT
details can be found in the individual product data sheets.
AD586
A
10k
TRIM
GND
R2
+15V
R
+15V
68
+15V
C1
0.1 F
33pF
VIN
VIN
VDD
FB
AD586
OUT 1
10V
VOUT
VREF
OUT
D586
VOUT
AD711K
1TRIM
10k
0 V TO ? 5V
V
AGND
10k
AD7545K
TRIM
GND
0.1 F
DGND
GND
VIN
5V
VOUT
DB11 TO DB0
?15V
AD586
1
0k
TRIM
Figure 11. Low Power 12-Bit CMOS DAC Application
GND
Figure 13. Multiple AD586s Stacked for
Precision 5 V, 10 V, and 15 V Outputs
REV. F
?7?
AD586
PRECISION CURRENT SOURCE
15V
The design of the AD586 allows it to be easily configured as a
2
220
current source. By choosing the control resistor RC in Figure 14,
N6285
the user can vary the load current from the quiescent current
(2 mA typically) to approximately 10 mA. The compliance
voltage of this circuit varies from about 5 V to 21 V, depending
0.1 F
on the value of VIN.
VIN
5V
+VIN
IL =
+I
VOUT
AD586
RC   BIAS
RC
GND
VIN
5V
Figure 15a. Precision High Current Current Source
IL =
+I
AD586
VOUT
RC   BIAS
RC
(500  MIN)
GND
15V
2
220
Figure 14. Precision Current Source
N6285
PRECISION HIGH CURRENT SUPPLY
0.1 F
For higher currents, the AD586 can easily be connected to a
power PNP or power Darlington PNP device. The circuit in
VIN
Figures 15a and 15b can deliver up to 4 amps to the load. The
VOUT
VOUT
AD586
0.1 ?F capacitor is required only if the load has a significant
5V @ 4 AMPS
GND
capacitive component. If the load is purely resistive, improved
high frequency supply rejection results can be obtained by
removing the capacitor.
Figure 15b. Precision High Current Voltage Source
?8?
REV. F
AD586
OUTLINE DIMENSIONS
8-Lead Ceramic Dual In-Line Package [CERDIP]
8-Lead Plastic Dual In-Line Package [PDIP]
(Q-8)
(N-8)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
0.055 (1.40)
0.005 (0.13)
0.375 (9.53)
MAX
MIN
0.365 (9.27)
0.355 (9.02)
8
5
0.310 (7.87)
8
5
0.295 (7.49)
0.220 (5.59)
PIN 1
0.285 (7.24)
1
4
0.275 (6.98)
4
1
0.325 (8.26)
0.100 (2.54) BSC
0.310 (7.87)
0.320 (8.13)
0.100 (2.54)
0.405 (10.29) MAX
0.150 (3.81)
0.300 (7.62)
BSC
0.290 (7.37)
0.135 (3.43)
0.060 (1.52)
0.120 (3.05)
0.015
0.015 (0.38)
0.200 (5.08)
0.180
(0.38)
(4.57)
MAX
MIN
MAX
0.150 (3.81)
0.200 (5.08)
0.015 (0.38)
MIN
0.125 (3.18)
0.150 (3.81)
0.010 (0.25)
SEATING
0.130 (3.30)
0.015 (0.38)
PLANE
SEATING
0.023 (0.58)
0.008 (0.20)
15
0.070 (1.78) PLANE
0.110 (2.79)
0.008 (0.20)
0.060 (1.52)
0.014 (0.36)
0
0.030 (0.76)
0.022 (0.56)
0.050 (1.27)
0.018 (0.46)
0.045 (1.14)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
0.014 (0.36)
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968)
4.80 (0.1890)
8
5
6.20 (0.2440)
4.00 (0.1574)
5.80 (0.2284)
3.80 (0.1497)
1
4
0.50 (0.0196)
1.27 (0.0500)
8
45
.75 (0.0688)
BSC
0.25 (0.0099)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
0
0.51 (0.0201)
1
1.27 (0.0500)
COPLANARITY
0.25 (0.0098)
0.31 (0.0122)
SEATING
0.10
0.40 (0.0157)
0.17 (0.0067)
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
REV. F
?9?
AD586
Revision History
Location
Page
1/04--Data Sheet changed from REV. E to REV. F.
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
7/03--Data Sheet changed from REV. D to REV. E.
Removed AD586J CHIPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Change to Figure 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated Figure 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4/01--Data Sheet changed from REV. C to REV. D.
Changed Figure 10 to Table I (Maximum Output Change in mV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
?10?
REV. F
?11?
?12?